1. Field of the Invention
The present invention relates to data processing devices that execute instructions conditionally, and in particular to a technology providing data processing devices and program conversion devices with high processing efficiency due to pipelining, in which problems do not occur such as a decreased freedom of allocation of instructions and an increase of the program memory capacity due to an increase of the instruction code length.
2. Description of the Related Art
In data processing, processes are often selected depending on conditions that arise during execution, regardless of the application of the data processing to, for example, scientific and engineering calculation and control. FIG. 32 shows a flowchart of a case-handling process. FIG. 32 is an example in which a process is selected depending on the state of the processor, which is a very common data process. First, an arithmetic computation is executed at Step 1001, and then, at Step 1002, it is judged whether the computation result of Step 1001 is zero. If the result of this judgment is that the computation result is not zero, the procedure advances to Step 1004, where a process 2 is executed, and if the result of the judgment at Step 1002 is that the computation result is zero, the procedure advances to Step 1003, where a process 1 is executed. Then, the procedure advances to Step 1005.
FIG. 33 is an example of an assembly machine program, in which the process of FIG. 32 is performed by a conditional branching instruction. First, a subtraction is carried out in the first line. At the same time, the processor generates a processor status expressing the nature of the result of the computation. For example, the processor status includes a carry flag indicating that a carry over occurred, a negative flag indicating that the result is negative, an overflow flag indicating that the result exceeded the expressible data range, and a zero flag indicating that the result is zero. The following second line contains a conditional branching instruction depending on the zero flag. If the zero flag is 1, then the instruction 1 on the third line is executed, the program branches at the fourth line unconditionally to a label 2, and the instruction 3 at the sixth line is executed. If the zero flag is 0, then the instruction at the third line is not executed but skipped by branching to the fifth line, which is marked by a label 1, and the instructions 2 and 3 are executed in that order.
In this conventional technology, if there is conditional branching, then there is the problem that in processors performing pipelining, which is a common approach to increase processor throughput, the processing efficiency may decrease due to pipeline stalls caused by the branching. A countermeasure is to use conditionally executed instructions in order to cut down the number of branching instructions.
FIG. 34 lists an assembly language program carrying out the process flow of FIG. 32 with conditionally executed instructions. This program is listed in assembler mnemonic notation. With the [SUB R0, R1] of the first line, the value of the register R1 is subtracted from the value of the register R0, and the result is stored in the register R1. If the result of this computation is zero, then the zero flag is set to 1, and if it is not zero, then the zero flag is set to 0. With the [MOVIFZF R2, R4] of the second line, if the zero flag is 1, then the value of the register R2 is stored in the register R4. With the [MOVIFNZF R3, R4] of the third line, if the zero flag is 0, then the value of the register R3 is stored in the register R4. With the [ADD R5, R6] of the fourth line, the value of the register R6 is added to the value of the register R5, and the result is stored in the register R6. Here, the instructions of the second line and the third line are conditionally executed instructions. FIG. 35 shows the instruction format of conditionally executed instructions. Conditionally executed instructions are expressed by an execution code 41 and a condition specifying field 40. For example, when taking true or false for the four kinds of status flags as the condition for execution, then the condition specifying field 40 can be expressed by three bits. The instruction is executed only if the conditionally executed instruction matches the condition of the condition specifying field 40, and is not executed if the conditionally executed instruction does not match the condition of the condition specifying field 40. Here, the information whether the instruction is executed unconditionally, whether it is a conditionally executed instruction, or which condition is used becomes clear when the individual instructions are decoded. Therefore, the processor also decodes instructions that are eventually not executed.
The following problems occur with regard to data processing with conditionally executed instructions according to the above-described conventional technology.
When selecting a process in accordance with a certain condition, instructions executed under contradictory conditions often are arranged successively in the program, and often are in a mutually exclusive relation. Case-handling programs that execute one of a plurality of successive processes depending on a certain condition and do not perform the other ones, are used in many situations of microprocessor control, and in these situations, one of the conditionally executed instructions is never executed. Moreover, if the program contains conditionally executed instructions, in which the subsequent process chain is executed only if a certain condition is satisfied and the subsequent process chain is skipped if this condition is not satisfied, then the subsequent process chain is not executed if the condition is not satisfied. In those cases, a pipeline flush is carried out in the microprocessor, and the data processing efficiency is decreased.
Furthermore, in order to provide the conditionally executed processes with a certain degree of freedom, it is necessary to allot code for and define many types of individual instructions as conditionally executed instructions, so that it inevitably becomes difficult to keep the code length short.